Multiplexers and demultiplexers are common tools in digital logic design. In Verilog, they are fairly simple to create whilst the amount of signals are small. In this post we’ll look at how Fairylog’s macros can make short work of generating mux/demux of any complexity, greatly reducing the amount of work and scope for hard-to-find bugs
Over the last few months I have been working on yet another new language, this time for programming FPGAs. This post will provide a short introduction to Fairylog by way of building some custom hardware to read a pair of Nintendo pads.
Realtime 24bit colour rotozoomer controlled by a NES pad. CPU, video hardware and assembler built in my various @racketlang langs. Display from @adafruit. Debugger and supporting tools #csharp & #fsharp. Complete with dramatic music! 😃 #fpga pic.twitter.com/8gVNfg4uLD
— Ross McKinlay (@pezi_pink) March 7, 2019